CaliQEC: In-situ Qubit Calibration for Surface Code Quantum Error Correction

Here is a peer review of the paper from the perspective of 'The Guardian'.

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Review Form

Reviewer: The Guardian (Adversarial Skeptic)

Summary

The authors present CaliQEC, a framework designed to perform in-situ calibration of physical qubits during the execution of surface code quantum error correction. The central thesis is that error drift, a critical obstacle for long-running quantum computations, can be mitigated without halting the entire computation. The proposed method leverages the theory of code deformation to selectively isolate drifting qubits for calibration, while dynamically enlarging the code patch to maintain the required level of error protection. The framework includes a preparation stage for device characterization, a compile-time scheduling algorithm to group and sequence calibration tasks, and a runtime system that applies the deformation instructions. The authors support their claims with simulations of large-scale applications and experiments on a small d=3 surface code implemented on existing quantum hardware.

Strengths

1. The paper addresses a well-recognized and critical problem in fault-tolerant quantum computing. Error drift is a fundamental limitation, and any practical solution would be of significant interest.
2. The core proposal to repurpose code deformation, a known theoretical tool for logical operations, for the purpose of dynamic qubit isolation is a valid and interesting line of inquiry.
3. The development and formalization of a dedicated instruction set for the heavy-hexagon topology (Section 6, page 7) represents a concrete technical contribution, as this architecture is prevalent in state-of-the-art hardware and cannot use square-lattice instructions directly.
4. The error drift model is, at least in part, grounded in measurements from a real quantum device (Fig. 9, page 9), which lends some credibility to the simulation parameters.

Weaknesses

My analysis has identified several areas where the paper's claims are insufficiently substantiated, and the methodology raises significant concerns about the validity and generalizability of the results.

1. The "Logical Swap for Calibration" (LSC) Baseline is a Strawman: The paper's primary quantitative claims hinge on the dramatic outperformance of CaliQEC over the LSC baseline. However, the LSC baseline as described in Section 7.3 (page 10) appears to be non-optimally designed. The assumption of a "roughly 4x qubit overhead" from a "straightforward 2D expansion" seems to represent a worst-case, naive implementation of state swapping. A more sophisticated scheduling system could utilize communication channels more efficiently or employ teleportation-based schemes with different resource trade-offs. By comparing against this simplistic baseline, the claimed 363% qubit overhead reduction by CaliQEC is likely inflated. A rigorous study would compare against a more competitive state-of-the-art method for state relocation.

2. Execution Time Claims Lack Rigor and Plausibility: The central claim of "negligible" execution time overhead is not supported by the evidence. In Table 2 (page 11), CaliQEC is reported to have exactly zero execution time overhead compared to the "No Calibration" baseline across all benchmarks. This is physically implausible. The processes of code deformation, measurement, qubit reintegration, and stabilizer remeasurement all require physical time. While these may run concurrently with computation in other parts of the chip, they must surely impact the QEC cycle time in the affected region, which would propagate to total execution time for any algorithm with data dependencies across the code patch. The paper fails to provide any breakdown of this timing or justify how it can be completely absorbed without penalty.

3. Extrapolation from Small-Scale Experiments is Unjustified: The hardware validation in Section 8.3 (page 12) is performed on a distance d=3 surface code. The primary simulation results in Table 2, however, are for codes with distances ranging from d=25 to d=47. The physics of error propagation, the complexity of decoding, and the potential for correlated errors from deformation operations do not necessarily scale linearly. A demonstration on a toy-sized d=3 code, which has limited error correction capability, provides insufficient evidence to validate claims about performance on large, practical code distances. The logical leap from d=3 to d=47 is substantial and unsupported.

4. Key Model Assumptions are Not Adequately Justified:

   • Error Drift Model: The authors adopt an exponential drift model (Eq. 1, page 5), while acknowledging that "some references report a linear drift model." The choice of an exponential model, which shows faster degradation, could make the need for frequent calibration appear more urgent, thereby favoring their solution. No sensitivity analysis is provided to show how the system would perform under a different, potentially more realistic, drift model.
   • Crosstalk Characterization: The method for identifying crosstalk-affected qubits nbr(g) (Section 4, page 5) relies on detecting "deviations beyond a threshold." This threshold is a critical hyperparameter that is neither defined nor justified. The size of the isolated region, and thus the entire space-time overhead, is highly sensitive to this value. Without a clear and defensible methodology for setting this threshold, the results cannot be considered robust.

Questions to Address In Rebuttal

The authors must address the following points directly to establish the credibility of their work:

1. Please provide a justification for the LSC baseline. Specifically, why is a "straightforward 2D expansion" considered a fair point of comparison, as opposed to more resource-optimized logical swap protocols described in the literature?
2. Provide a detailed, quantitative breakdown of the execution time overhead. How can the sequence of operations required for deformation and calibration (e.g., DataQ_RM, PatchQ_AD) be implemented with precisely zero impact on total program runtime as claimed in Table 2? What is the effect on the local QEC cycle duration?
3. Address the significant discrepancy in code distance between the hardware demonstration (d=3) and the primary simulation results (d=25-47). What theoretical or experimental evidence can you provide to support the claim that the performance benefits and error suppression capabilities of CaliQEC will hold when scaling up by more than an order of magnitude in code distance?
4. How sensitive are your scheduling and overhead results to the choice of an exponential error drift model? Please provide data on how the system would perform if a linear drift model were assumed instead.
5. What is the specific, quantitative definition of the "threshold" used to determine crosstalk-affected qubits in Section 4? Please provide a sensitivity analysis showing how the qubit and time overheads change as this threshold is varied.

Of course. Here is a peer review of the paper from the perspective of "The Synthesizer."

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Review Form

Reviewer: The Synthesizer (Contextual Analyst)

Summary

This paper presents CaliQEC, a comprehensive framework for performing in-situ calibration of physical qubits during a running, surface-code-protected quantum computation. The work is motivated by the critical problem of "error drift," where the performance of physical qubits degrades over time, jeopardizing the long computations required for fault-tolerant quantum computing (FTQC). The core technical contribution is the novel repurposing of code deformation, a technique typically used for implementing logical gates, as a mechanism for physical hardware maintenance. By dynamically modifying the surface code structure, CaliQEC can temporarily isolate drifting qubits for calibration and then reintegrate them, all without halting the logical computation. This mechanism is supported by a full-stack, compiler-level approach that includes preparation-time device characterization, drift-based calibration grouping, and an adaptive scheduling algorithm to manage the space-time resource trade-offs. The authors evaluate CaliQEC against two sensible baselines—no calibration and a naive "Logical Swap for Calibration" (LSC) approach—demonstrating through simulation and small-scale hardware experiments that their method can maintain a target logical error rate with minimal qubit and time overhead.

Strengths

1. Addresses a Foundational, System-Level Problem: The most significant strength of this work is that it tackles a problem of fundamental importance to the future of FTQC. While much of the literature focuses on designing better codes or faster decoders under a static noise model, this paper confronts the messy reality of dynamic, time-varying hardware. Error drift is a well-known but often-overlooked roadblock that stands between current NISQ devices and future fault-tolerant machines. By providing a practical solution, this work bridges a crucial gap between QEC theory and experimental reality. The analogy drawn to DRAM refresh in classical computing (Section 1, page 2) is particularly apt and effectively frames the problem for the broader computer architecture community.

2. Elegant Repurposing of an Existing Technique: The core insight—to use code deformation for hardware maintenance—is both clever and powerful. Code deformation is a known primitive in the surface code literature, primarily for implementing logical gates and moving logical qubits (e.g., lattice surgery). The authors have recognized that this same tool for manipulating logical information can be masterfully repurposed for managing the health of the physical substrate. This is a beautiful example of cross-pollination, applying a concept from the logical layer to solve a problem at the physical layer, thereby creating a tightly integrated, cross-layer solution.

3. Holistic and Complete Framework: This is not merely a theoretical proposal; it is a well-thought-out systems paper. The CaliQEC framework is comprehensive, encompassing the entire lifecycle of the problem:

   • Characterization (Section 4): A practical method for measuring the key physical parameters (drift rate, calibration time, crosstalk) needed to inform the strategy.
   • Compilation (Section 5): A sophisticated, two-stage scheduling algorithm that intelligently groups calibration tasks and schedules them to balance parallelism against resource overhead.
   • Runtime (Section 6): The formalization of dedicated instruction sets for both square and heavy-hexagon lattices, demonstrating a clear path to implementation on real-world hardware topologies.

4. Strong and Persuasive Evaluation: The experimental design is excellent. The choice of baselines is perfect for highlighting the contribution: "No Calibration" demonstrates the necessity of a solution, while "Logical Swap for Calibration" (LSC) represents a plausible but naive alternative that effectively underscores the efficiency and fine-grained nature of CaliQEC. The results presented in Table 2 (page 11) are compelling, showing a dramatic reduction in qubit overhead (e.g., from 363% for LSC to ~24% for CaliQEC) while successfully managing the retry risk. The inclusion of small-scale experiments on real Rigetti and IBM hardware (Section 8.3, page 12) provides a crucial proof-of-concept, grounding the simulation results in physical reality.

Weaknesses

While this is an excellent paper, its primary weaknesses lie in the assumptions it makes about the interaction between its proposed system and the broader (and still developing) FTQC software/hardware stack.

1. The "Cost" of Deformation: The paper frames the overhead of CaliQEC primarily in terms of additional compensation qubits and scheduling complexity. However, the code deformation instructions themselves consist of sequences of physical measurements and gate operations. These operations are not error-free. There is a potential risk that the errors introduced by the deformation process itself could, in some regimes, negate the benefits of calibrating a drifting qubit. The analysis does not seem to fully account for the error burden of the deformation/reintegration process itself.

2. Scheduler Integration and Contention: The paper presents the calibration scheduling problem (Section 5, page 5-7) in isolation. In a real FTQC system, this scheduler would not operate in a vacuum. A separate compiler module would be scheduling logical operations, some of which (like T-gates via magic state distillation or logical CNOTs via lattice surgery) also require significant space-time resources and potentially use the same code deformation primitives. The paper does not discuss how resource contention between the "maintenance scheduler" (CaliQEC) and the "computation scheduler" would be resolved. This is a critical next step for integrating such a system into a full FTQC architecture.

3. Assumptions about Crosstalk Characterization: The method for characterizing crosstalk (Section 4, page 5) involves isolating qubits identified as neighbors. This model seems to primarily capture local crosstalk. However, longer-range crosstalk effects (e.g., frequency crowding, control line coupling) are known to exist in large quantum processors. The current model might underestimate the size of the "isolation zone" needed in a dense, large-scale system, which could impact the overhead calculations.

Questions to Address In Rebuttal

1. Regarding the code deformation instructions (Section 6, page 7-8), could the authors comment on the potential for the deformation/reintegration process to introduce errors? Have they analyzed the trade-off where the error incurred by the act of isolating a qubit might be greater than the error prevented by calibrating it?

2. The intra-group scheduling algorithm (Section 5.3, page 7) is a key component for efficiency. Could you elaborate on how this calibration scheduling would be integrated with a parallel scheduler for logical operations? For instance, how would the system prioritize between performing a logical CNOT via lattice surgery and isolating a patch for calibration if both require modifying the same region of the code?

3. In your evaluation (Section 8, page 10, QECali paragraph), the maximum tolerable distance loss is set to Ad=4. Could you provide more intuition on how this parameter was chosen? How sensitive are the overall performance results (particularly qubit overhead and retry risk) to the choice of Ad? Is there a systematic way to determine the optimal Ad for a given hardware architecture and application?

Review Form

Reviewer: The Innovator (Novelty Specialist)

Summary

The authors present CaliQEC, a framework for performing in-situ physical calibration of qubits within a live surface code computation. The central problem addressed is error drift, where qubit and gate performance degrades over time, eventually compromising the effectiveness of quantum error correction (QEC). The proposed solution leverages the theory of code deformation—a known technique for modifying the structure of a surface code patch—to temporarily isolate drifting physical qubits, perform a full calibration, and then reintegrate them into the code, all while the logical computation proceeds on the deformed patch. The framework also includes a device characterization stage and an adaptive scheduling algorithm to manage this process efficiently.

My analysis concludes that while the foundational theoretical tool (code deformation) is not new, its specific application and the comprehensive engineering framework built around it for the purpose of dynamic, in-situ physical calibration represents a novel and significant contribution. The key novelty lies in the shift from using deformation to handle static, permanent defects to managing dynamic, temporary states of qubit unavailability for maintenance.

Strengths

The primary strength of this paper, from a novelty perspective, is the creative repurposing and significant extension of an existing theoretical tool to solve a different, and highly practical, problem.

1. Novel Application of Code Deformation: The theory of code deformation [10, 67] is well-established, primarily for implementing logical gates (lattice surgery) or for handling static, defective qubits [53, 64]. This paper's core conceptual leap is to treat a qubit undergoing calibration as a temporary, scheduled defect. This reframing is non-trivial and allows the entire machinery of defect tolerance to be applied to the problem of runtime maintenance. This appears to be the first formal proposal and evaluation of such a strategy.

2. New Instruction Set for Heavy-Hexagon Topology: The authors acknowledge that the instructions for square lattices are adapted from prior work [70]. However, the design and formalization of a new code deformation instruction set specifically for the heavy-hexagon topology (Section 6.1, Page 7) is a concrete and novel contribution. This is particularly relevant given that this topology is used in state-of-the-art hardware (e.g., IBM devices) and presents non-trivial structural differences from a simple square lattice, such as shared ancilla qubits and varying qubit connectivity (Figure 8, Page 8).

3. Synthesis into a Complete Framework: The novelty is not just in a single idea but in the construction of a full-stack solution. The combination of (a) device characterization to model drift (Section 4, Page 5), (b) an adaptive scheduling algorithm to manage calibration overhead (Section 5, Page 5), and (c) a runtime deformation mechanism constitutes a complete, novel framework that did not exist before.

Weaknesses

My concerns are not with the validity of the work, but with ensuring the "delta" over prior art is precisely and defensibly articulated.

1. Overlap with Prior "In-situ Calibration" Concepts: The term "in-situ calibration" is not entirely new in this context. The work of Kelly et al. [34], "Scalable in situ qubit calibration during repetitive error detection," presents a method for concurrent calibration. The authors of the current paper do cite this work and differentiate their approach by stating that [34] relies on "speculative estimation of control parameters rather than physical calibration" (Section 2, Page 2). While this distinction is crucial, the novelty rests heavily on the argument that such estimation is insufficient for fault-tolerant QEC and that full, disruptive physical calibration (requiring isolation) is necessary. The paper’s novelty claim would be weakened if the methods in [34] could be extended to achieve the required fidelity.

2. Adaptation of Existing Scheduling Heuristics: The proposed scheduling algorithm (Section 5.3, Page 7) is a greedy heuristic designed to balance parallelism and resource overhead. While its application to scheduling code deformations is novel, the underlying principles (e.g., sorting by a priority metric, iteratively building non-conflicting batches) are common in classical scheduling problems. The paper should be careful not to overstate the algorithmic novelty of the scheduler itself, but rather focus on the novelty of the scheduling problem and the custom cost model (Cost = Δd * Σ t_cali[g]).

Questions to Address In Rebuttal

1. Regarding Kelly et al. [34]: The authors correctly differentiate their work from [34] on the grounds that it performs full physical calibration rather than parameter estimation. Could the authors elaborate further on the practical limitations of the approach in [34] that render it insufficient for the long-running, fault-tolerant applications targeted in this paper? Specifically, are there classes of drift (e.g., frequency shifts vs. amplitude errors) that estimation-based techniques fundamentally cannot correct, thus necessitating the physical isolation proposed in CaliQEC?

2. Novelty of the Scheduling Heuristic: The scheduling algorithm in Section 5 is presented as a heuristic to solve the complex trade-off between calibration time and code distance loss. While its application is novel, are the core algorithmic principles themselves adaptations of known scheduling heuristics from other domains? Clarifying this would help isolate the precise novel contribution in the scheduling component.

3. Generalizability of the Design Principles: The development of a deformation instruction set for the heavy-hexagon topology is a clear strength. How general is the design principle described as "leveraging residual connectivity" (Section 6.1, Page 8)? Could this principle be systematically applied to generate instruction sets for other complex QEC code geometries, or does each new topology require a completely new, bespoke design effort from first principles?